"NVLink Fusion gives customers the ability to choose the CPU architecture, the performance level, the software capabilities that best meet their needs for the workloads that they care about." That is Tim Wilson, vice president and general manager of data center silicon engineering at Intel—a competitor—praising the interconnect his customers will now build on.
Read it again, because the strangeness is the story. Intel is endorsing an NVIDIA fabric. AWS is reportedly using it to accelerate deployment of Trainium4, its own homegrown accelerator. Qualcomm and Fujitsu are building custom CPUs to plug into it. MediaTek and Marvell are designing ASICs for it. SiFive, the RISC-V pioneer, is reportedly porting CUDA and integrating NVLink Fusion into future platforms.
Every one of these companies makes silicon meant, in whole or in part, to unseat NVIDIA. And NVIDIA has rolled out the welcome mat for all of it.
Every one of these companies makes silicon meant to unseat NVIDIA. And NVIDIA has rolled out the welcome mat for all of it.
Why would the accelerator monopolist invite its rivals' chips onto its own rack?
Because it stopped selling GPUs and started selling the factory floor.
NVLink Fusion is not a product for GPUs. It is a licensing regime that lets a hyperscaler or AI-native firm drop its custom XPU—an ASIC, a CPU, an inference accelerator—into NVIDIA's rack-scale architecture and connect it to NVIDIA's scale-up fabric. NVIDIA calls this "semi-custom AI infrastructure." The word doing the work is "semi."
The custom part is your silicon. The infrastructure part is NVIDIA's, and that is where the money now lives.
Consider what NVLink Fusion actually delivers, because the spec is the trap. NVLink 6 can reportedly connect 72 XPUs all-to-all at 3.6 TB/s each. For XPU-to-XPU transfers, end-to-end latency is 3x lower than off-the-shelf Ethernet and the packet rate is 10x higher.
At the scale where these systems run—trillion-parameter models, mixture-of-experts, agentic inference—that gap is no luxury. If the scale-up fabric can't keep up, utilization drops and cost per token rises, which is the only metric an AI factory is measured on.
So the fabric makes plugging in irresistible. Your ASIC is only as good as the network feeding it, and NVIDIA's network is the best available. Once your silicon speaks NVLink, your rack is an NVIDIA rack, your rack footprint is NVIDIA's MGX architecture, your supply chain is the same one NVIDIA uses for its own systems.
That last point is the one nobody says out loud. NVLink Fusion adopters connect, in NVIDIA's own words, to "the same, proven supply chain that NVIDIA uses for its own MGX-based systems." QCT and Quanta reportedly have Vera Rubin builds approaching full automation, and as Jack Luoh of QCT put it, "most of those investments can be leveraged if the XPU leverages NVLink Fusion."
Translate that: the manufacturing efficiency you gain by adopting NVLink Fusion is the manufacturing efficiency NVIDIA already built for itself. You are not escaping NVIDIA's orbit by designing your own chip. You are subsidizing the orbit.
Here is the pivot that makes this a strategy rather than a concession. When silicon commoditizes—and custom ASICs proliferating across five vendors is precisely what commoditization looks like—the margin migrates to whoever controls the layer everyone must share.
NVIDIA has decided that layer is the interconnect, the DPU, the rack, and the supply chain. Let the logic dies fight it out. Whoever wins pays the toll to plug in.
The genius, and the danger, sits in a single stated benefit. NVLink Fusion, NVIDIA says, lets operators "decouple data center design and buildout from silicon readiness and supply." You can pour concrete, run power, install cooling and networking before you've decided whose chip goes in the rack—then reprovision as workloads and supply shift.
MediaTek's Vince Hu describes exactly this appeal: deploy the rack-level solution with the NVIDIA GPU, then "decouple the development of their XPU and put it at a different pace."
That flexibility is real, and genuinely valuable to a hyperscaler staring down power-procurement timelines that outrun any chip roadmap. AI factory planning doesn't wait for silicon.
But read the decoupling from NVIDIA's side of the table. If the data center is built to NVIDIA's rack spec, cooled by NVIDIA's power and cooling assumptions, networked on NVIDIA's fabric before the silicon is chosen—then the silicon choice was never the lock-in point. The building was.
The chip becomes the swappable part. The fabric becomes permanent. That is the inversion: NVIDIA has made its own architecture the thing you commit to first and change last, while your custom accelerator—the whole point of the exercise—is the thing you can defer, swap, or abandon.
Switching costs run in one direction. Once 72 accelerators are wired all-to-all at 3.6 TB/s inside an NVLink domain, rebuilding that topology on any alternative fabric means eating the 3x latency and 10x packet-rate penalty NVIDIA just quantified for you. The number is not marketing. It is the moat, expressed in microseconds.
This is why the "openness" is not generosity. It is the mechanism. An open interconnect that everyone adopts is worth more to its owner than a closed one that only its owner uses, provided the owner keeps control of the standard. NVIDIA alone defines NVLink, ships the NVLink Switch chip, and reportedly sets the roadmap toward 1,152-accelerator domains. The rivals get to plug in. They do not get to steer.
BlueField-4 tightens the same collar from a different angle. The DPU reportedly carries 64 Arm Neoverse V2 cores and up to 800 Gb/s of throughput, offloading networking, storage, and security into a dedicated infrastructure domain that sits underneath every workload in the rack.
Whatever XPU you chose upstairs, the infrastructure plane belongs to NVIDIA, running NVIDIA DOCA software, enforcing tenant isolation on NVIDIA silicon. Even the Arm cores that might have represented an insurgency against x86 arrive here as NVIDIA's own control plane.
Which brings us to the sharpest image in the whole affair: SiFive.
SiFive is the company that founded RISC-V, the open-standard architecture built explicitly as an alternative to proprietary instruction sets. Its BigSky server is, per SiFive, the world's first enterprise-grade rackable RISC-V machine, running Ubuntu and RHEL out of the box, pitched as proof that open silicon is production-ready today.
And what is SiFive doing with that open-standard credibility? Porting CUDA to RISC-V. Integrating NVLink Fusion into future platforms. Running CUDA on BigSky right now as a head node—reportedly feeding NVIDIA GPUs.
The open insurgent's flagship achievement is serving as an orchestration layer for NVIDIA's accelerators, speaking NVIDIA's proprietary software, headed toward NVIDIA's proprietary fabric.
RISC-V arrives at the datacenter wearing NVIDIA's collar. So does Arm, inside BlueField. So does Trainium, so do the Fujitsu and Qualcomm CPUs, so do the Marvell and MediaTek ASICs.
For regulators, this should read less like a chip vendor and more like a fabric monopolist. The old antitrust question—does NVIDIA dominate GPU sales—is becoming the wrong question. The new one is whether every serious AI accelerator in the market, including the ones designed to compete with NVIDIA, must route through an interconnect, a DPU, and a rack standard that one company controls end to end.
NVIDIA has not lost the accelerator war. It has changed what winning means. Let a thousand XPUs bloom. Each one that blooms plugs into the same fabric, buys from the same supply chain, and pays the same toll.
The company that owns the rails does not need to own every train.