The memory maker that owns a foundry is paying its foundry rival to build the logic floor of Nvidia's custom HBM. Samsung Electronics will use TSMC's 3-nanometer process to manufacture the base die for NVHBM, Nvidia's custom high-bandwidth memory, according to Seoul Economic Daily reporting from October 18. That floor, not the DRAM stacked above it, is now where the money and the leverage sit.
Last week this column flagged Samsung's NVHBM base-die routing as an open thread, with its own 4nm qualification the question to watch. This week the thread closed in an unexpected direction: a reported delivery-reliability premium, a validated fallback path, and Nvidia consolidating a three-supplier base-die standard on a single foundry's 3nm lines.
Start with why the floor matters. HBM is a stack of DRAM core dies sitting on a base die that handles communication between memory and GPU. In Nvidia's design, the memory controller — historically resident on the GPU — moves onto that base die, and the physical layer shrinks 60% from standard HBM to make room. The payoff, per Nvidia: up to 30% more bandwidth and 15% less power than standard HBM4E, with the GPU freed of up to 25% of its area for compute.
The base die is now a logic chip, and logic chips come from foundries — so control of AI memory supply is being decided at the logic-and-packaging layer.
You cannot pack relocated GPU functions into a base die without an ultra-fine logic node. That is the whole game. Nvidia asked all three memory makers — Samsung, SK hynix and Micron — to standardize on TSMC 3nm for the base die and 1c DRAM for the core, so its designed performance lands consistently across suppliers and validation burden falls. The base die is now a logic chip, and logic chips come from foundries.
Samsung's turnkey model — memory and logic under one roof — was the thing it sold against SK hynix's alliance with TSMC and the back-end ecosystem. For Nvidia, it just broke that model, and only for Nvidia. Samsung's own HBM4, in production since early 2026, and HBM4E, now in production validation, both use Samsung Foundry 4nm base dies with core dies from 1c lines at Hwaseong and Pyeongtaek. Custom HBM for AMD and others stays in-house.
So why would Nvidia route the floor through TSMC? Capacity as much as performance. Samsung's 4nm base-die lines sit only at Hwaseong Line 17 and part of Pyeongtaek P3 — a footprint built for existing HBM demand, not custom HBM volumes like NVHBM. TSMC, meanwhile, is adding two 3nm lines at Fab 18 in Tainan, with mass production in the first half of next year and the first half of the year after, plus 3nm at its second Arizona fab targeting Q3 2027 and Kumamoto's second fab in 2028.
Then there is the yield picture. Industry estimates put TSMC's 3nm yield above 90%, against roughly 60% for Samsung Foundry's comparable SF2 2nm process. For Nvidia, consolidating at TSMC is the stable choice — and the capacity to fill Samsung's base-die shortfall.
Here is the turn. This is not capitulation; it is a re-pricing of the stack, and Samsung is behaving like a supplier that knows it. Wccftech reported Samsung quoting HBM at up to a 25% premium over rivals, resting on data-center customers valuing its delivery reliability — the turnkey model's one unambiguous advantage. The same report cites a 4nm base die and an approximately 80% HBM4 yield claim as the technical backdrop, against quotes of $4.00 for Micron and $3.60–3.80 for SK hynix.
Industry sources caution those figures are unofficial — social-media chatter recycled, not contract terms, with no stated generation or per-gigabyte basis. The read that market leader SK hynix is undercutting rivals sits badly with industry reality. Treat the number as a signal about positioning, not a price list.
But the premium and the TSMC routing are the same story told twice. Samsung is charging for delivery certainty on the memory side while buying logic certainty on the base-die side — and simultaneously validating whether NVHBM's base die can be made in its own foundry, explicitly to hedge against NVHBM demand exceeding TSMC's capacity. When TSMC's 3nm lines are also serving high-performance computing and smartphones, allocation can hit a ceiling; the fallback is Samsung Foundry on 2nm, positioned as comparable to TSMC's 3nm.
That is the structural consequence. Base-die demand is set to expand as DRAM shortage pushes designs toward lower stacks and more packages — shifting HBM value toward more base dies and more advanced packaging, a foundry opportunity layered on top of the memory one. UBS projects HBM demand next year at roughly 61.5 billion gigabits, up 91%, against new shipments near 54.6 billion gigabits — a shortfall near 10%. UBS also flags advanced packaging throughput as the core risk: if TSMC's CoWoS capacity constrains, system integration slips and memory makers sit on finished stacked HBM.
Control of AI memory supply is being decided at the logic-and-packaging layer, not the DRAM array. Custom HBM is the vector — standard HBM struggles to optimize for each AI chip, so base dies move fully to logic processes and new functions move in with them. TrendForce frames the competition as shifting to integration, with TSMC the main foundry on process lead and ecosystem. CoWoS-S is the strategic bottleneck underneath it: advanced logic wafers and HBM can both be available, and an accelerator still cannot ship until they are bonded, tested and qualified as one package.
Now look past HBM-on-GPU entirely. Imec's 3D volumetric DRAM-on-GPU work rotates DRAM dies vertically above the GPU with cooling cavities between them, plus a distributed memory-controller/network-on-chip tier — explicitly moving beyond HBM-on-GPU thermal limits. The base die's descendants are architectural tiers, and the integration stack that makes them real is foundry-owned.
Which is why the foundry allocation, not the DRAM fab, now sets who gets paid and who gets squeezed. TSMC collects base-die 3nm wafer revenue alongside the packaging step, and its ecosystem maturity shortens debugging cycles for multi-die accelerators — few suppliers match leading-edge foundry access, packaging precision, capacity investment and customer trust in one place. SK hynix holds roughly 50% of global HBM revenue as of the second quarter, per Counterpoint, nearly matching Samsung and Micron combined, and its TSMC-plus-back-end alliance is exactly the position the market has rewarded. Samsung's counter is a premium for a turnkey promise it just partially outsourced.
The open question is the one worth carrying forward. If TSMC's 3nm allocation hits a ceiling, will Samsung Foundry qualify its own 4nm or 2nm base die for NVHBM — and would Nvidia accept a second base-die source at all, having standardized three memory makers on one foundry's lines for performance consistency? The answer determines whether Samsung's turnkey model survives as a premium, or gets priced as a default.