Article — "TSMC's Capacity Crunch Forces Google and Nvidia to Court Intel Foundry": Article — "TSMC's Capacity Crunch Forces Google and Nvidia to Court Intel Foundry": Start with the number that should make Intel's foundry ambitions look hopeless. In June, TSMC's revenue jumped 68% year over year, dragging second-quarter sales to the top end of guidance. Management raised full-year growth guidance above 40%, a sharp step up from the earlier above-30% target. Q2 gross margin reportedly landed at 67.7%, and earnings per share reportedly hit a record 27.25.
These are the best numbers TSMC has ever posted. And they are precisely why Google and Nvidia are knocking on Intel's door.
That is the contradiction most readers get backward. A foundry this dominant is supposed to entrench itself and starve rivals of oxygen. Instead, TSMC's leading-edge lines and advanced-packaging lines are both running at capacity, and a firm that commands over 70% of advanced chip manufacturing cannot physically absorb its own order book. Scarcity, not weakness, is what reopened the door Intel spent five years failing to pry open on its own.
Scarcity, not weakness, is what reopened the door Intel spent five years failing to pry open on its own.
Last week, the Intel 18A story was still mostly a yield question — could the process hold up under real production volume? This week it becomes a customer question, because there are now named blue-chip orders attached to it rather than speculation.
Here is what those orders actually are, because the gap between headline and substance is the whole story.
Google is the real one. After months of testing Intel's advanced packaging, it has placed an order for more than three million tensor processing units to be built at Intel Foundry in 2028. Morgan Stanley projects Google's total TPU output could exceed six million units over two years. That is a dated, sized commitment — the kind that shows up in capacity planning.
Nvidia is not that. Nvidia is evaluating. It is testing whether Intel's process fits its next-generation Feynman family — a design integrating four GPU dies, slated for 2028 — and it has started early test chips on Intel 18A through multi-project wafer runs. No order has been placed. Nvidia is reportedly TSMC's largest customer, having passed Apple.
The distance between "placed an order for three million units" and "started early test chips" is not a rounding error. It is the difference between revenue and a science project. Treating them as a single "Google and Nvidia pick Intel" story flatters Intel's position considerably.
Now look at what is actually pulling these customers in, because it is not leading-edge logic.
It is packaging. Intel's Embedded Multi-die Interconnect Bridge, EMIB, does functionally what TSMC's CoWoS does, but with cheaper small silicon bridges instead of a full interposer. And CoWoS is exactly the bottleneck AI accelerators are choking on. Intel has partnered with Amkor to expand EMIB capacity in Korea, Portugal, and Arizona — a supply-assurance play, not a bet on beating TSMC at 2nm.
The pattern repeats on the software side. At DAC, Synopsys announced it had certified its AI-powered EDA flows on Intel 14A, extending work already production-ready on 18A and 18A-P. Notably, its 14A reference flow supports EMIB and EMIB-T packaging, with automated HBM and UCIe routing. Read the sequence: the ecosystem is being wired up first for packaging and multi-die integration, with leading-edge logic following behind.
So the near-term draw is overflow capacity in packaging. The leading-edge logic courtship is real but embryonic. Understanding that ordering matters, because it tells you what kind of relationship this actually is.
Second-sourcing at the leading edge is not a purchase order. It is a multi-year trust-building exercise, and the asymmetry between the two foundries is brutal.
TSMC has a decade of earned reliability. When it says a node will ship in volume at a given yield on a given date, customers build product roadmaps around that promise because the promise has held. That credibility is not a spec sheet number; it is an accumulated record.
Intel's record is the opposite. Since standing up its foundry services arm in 2021, it has posted production delays and operating losses in the business it built specifically to catch TSMC. The very thing a large fabless customer must trust before shifting volume — predictable delivery — is the thing Intel has never consistently demonstrated.
This is why the 18A yield debate, while real, slightly misses the point. Suppose 18A yields hold. Suppose 14A matches TSMC's and Samsung's 2nm. Design wins still do not become shipped volume until Intel proves it can deliver millions of good die on schedule, quarter after quarter. Yield is a precondition. Predictable volume delivery is the actual test, and it is the one Intel has failed most publicly.
There is a quieter detail that undercuts the "Intel is charging ahead" narrative, and it comes from TSMC's own chairman. C.C. Wei (魏哲家) told shareholders that TSMC has completed its purchase of High-NA EUV equipment but has not deployed it to volume production, because the cost is too high. The company is working the technology and cost curve before committing it to a production line.
That matters because Intel has made High-NA a centerpiece of its comeback story, buying the tools early to signal it was leapfrogging TSMC. But bought-but-idle is exactly where TSMC sits too — by choice, on its own timeline. The most disciplined foundry on earth is holding the same expensive tool in reserve. Owning High-NA is not a lead; deploying it profitably at volume is, and neither company has done that yet.
Strip away the drama and here is what these deals are. Hyperscalers facing a hard capacity ceiling are underwriting Intel's foundry as insurance. Google is paying to reserve a second source. Nvidia is paying, in engineering time, to keep the option alive. Neither is abandoning TSMC — Nvidia is still its biggest customer, and TSMC's margins tell you no one is fleeing.
This is overflow-capacity renting dressed up as a competitive realignment. The monopoly is not breaking; it is overflowing.
Intel's opening is genuine, and it should not be dismissed. But the opening's dimensions are defined entirely by TSMC's inability to expand fast enough, not by anything Intel has proven about its own manufacturing. That is a borrowed window, not an earned one.
Which sets up the real question the next two years will answer. TSMC is spending — 2026 capital expenditure reportedly raised to $60–64 billion, with another hundred billion committed to the United States. It is building capacity as fast as capital allows.
The moment TSMC catches up to demand, the pricing power that reportedly let it push 3% to 10% increases on sub-3nm nodes becomes the pricing power to win back any volume that wandered off. At that point, Intel's insurance policy is only worth renewing if it has converted design wins into reliable, shippable volume in the interim.
If 18A and 14A can turn Google's three million TPUs into product that ships on time at yield, Intel earns a seat as a real second source, and the industry gets the structural redundancy it has needed for a decade. If they cannot, the courtship collapses back into single-sourcing the instant TSMC's new fabs come online.
The order book, in other words, is not the finish line. It is the starting gun on the one race Intel has never won.