Start with what the flagship product is telling you, because it contradicts what the CEO is saying.
Reports surfaced that Nvidia's next-generation Vera Rubin NVL72 would ship with roughly 28TB of SOCAMM DRAM, down from the ~55TB the market expected — with most systems dropping to 96GB modules instead of the anticipated 192GB.
Then, in Seoul, Jensen Huang issued the denial. Nvidia will "keep using a lot of HBM," he said — the company just "has to be smarter" about how it allocates memory and fights for more supply.
Read those two things together and you have your answer. A company halving the memory footprint of its flagship rack while insisting it is not cutting memory is not reassuring you; it is confirming that the shortage is real and has already reached the top of the product stack.
Nvidia's out is technical: the cut lands on the CPU-side LPDDR5X, not the HBM4 on the GPU package, which reportedly holds steady. And because SOCAMM is a socketed, upgradeable module, the 28TB figure is an initial configuration, not a ceiling.
But that framing only sharpens the point. When even the memory that isn't scarce gets rationed to protect the memory that is, you are looking at a supply chain triaging itself.
When even the memory that isn't scarce gets rationed to protect the memory that is, you are looking at a supply chain triaging itself.
Last week in this space we covered Bernstein's forecast: HBM prices up 2 to 2.5x next year, dragging hyperscaler capex up roughly 30%. This week Huang confirmed the thesis in his own words — calling the shortage "structural" and multi-year — and added a materials chokepoint the forecast barely touched.
Here is the problem with "structural." It sounds like a diagnosis. It is actually a euphemism, because it implies the constraint is something capital and time will eventually grind down. The evidence says otherwise.
Start with the physics Huang himself laid out. A new memory fab takes two to three years from groundbreaking to volume. HBM's proprietary steps — 16-layer stacking, TSV through-silicon vias — see yields improve slowly, so capacity releases in a trickle.
Then the wafer penalty, the number that should end the "just build more fabs" conversation. HBM consumes roughly three times the wafer area of commodity DRAM because of the vertical stacking and packaging. Every HBM bit you make cannibalizes three times its share of fab capacity from the rest of the market.
This is why the supply curve doesn't bend the way capital expects. You can pour concrete — Micron is committing roughly $250 billion to U.S. production, with vertical construction underway in Clay, New York — and still be output-constrained, because the 3:1 penalty means the same silicon buys you a third of the bits.
Only three companies — Samsung, SK Hynix, and Micron — can reportedly mass-produce HBM4 at all. Their entire 2026 output is already locked by downstream customers, and some bookings run to 2028. Micron's entire 2026 HBM production is reportedly sold at fixed prices with bookings stretching into 2027; customer inquiries reportedly exceed what it can supply through 2028.
Now the part the capex narrative misses entirely, because it lives upstream of the fab. The binding constraint isn't fabs. It's gas.
Tungsten hexafluoride — WF6 — is indispensable to 3D NAND, HBM, and advanced logic. High-purity WF6 in the Chinese market reportedly hit 1,670 to 1,810 RMB per kilogram as of early June, per 买化塑研究院, up more than 230% year over year. Japanese and Korean suppliers have raised prices repeatedly since October 2025, with 2026 increases of 70% to 90% and warnings of second-half shortfalls.
You cannot fix a materials chokepoint with a capex line item. A fab in Idaho, reportedly slated to produce its first wafers in 2027, does not manufacture its own process gas, and a major Chinese WF6 producer's added 1,000-tonne expansion doesn't come online until 2027. The molecule is the wall, and no announcement conjures it faster.
So the constraint is not "we need more factories." It is a physics tax, levied at three points — wafer area, TSV yield, and process gas — none of which respond to money on the ordinary capex clock.
That would merely be a supply story if the cost stopped there. It doesn't, and this is where "structural shortage" reveals itself as structural transfer.
Bernstein's arithmetic: for Nvidia to defend its 75% gross margin, it must amplify any HBM cost increase by roughly 4x when it passes it on. HBM is packaged inside the GPU; to hold the margin ratio, the dollar markup has to scale with the input cost, not just track it.
Run the 2-2.5x HBM increase through that 4x amplifier — layered on top of conventional DRAM and NAND inflation — and you arrive at the ~30% hyperscaler capex hit. The memory price rise doesn't reach the cloud buyer; a multiple of it does.
That is the mechanism. A physics tax at the bottom of the stack becomes a margin cascade by the time it exits the top, and the widening happens inside Nvidia's pricing model, by design.
Which is why no one positioned near the bottleneck has any incentive to break it.
Consider the incentive map. Bernstein expects 2027 EPS estimates for Samsung, SK Hynix, and Micron to be revised up 25% to 40% above consensus. Micron has torn up the boom-bust playbook entirely — its business now runs on multi-year take-or-pay contracts, backed by billion-dollar cash deposits, where customers pay whether they take delivery or not.
The old memory cycle, per one industry read, was famous for making lots of money at 50% margins, then selling below cost two years later. The new structure rewards holding the line. Samsung has already told investors, per Bernstein's analysis, that non-HBM DRAM margins now exceed HBM margins — and that the gap should "narrow significantly" in 2027, which E9's author reads as implying HBM price hikes are now irreversible.
Nvidia harvests the 4x amplification. The three memory makers harvest locked-in pricing and multi-year visibility. The gas suppliers harvest a 230% move. Every link closest to the physics tax is collecting rent from it.
The one caveat worth honoring: not everyone thinks this is pure scarcity. One industry read argues the boom is mostly a capacity-allocation problem, that memory bits are still growing at the usual ~20% a year, and that the revenue explosion is 3-5x pricing, not shipment growth — same bits, same technology, more money. HBM, on that view, is only about 20% of DRAM bits and currently carries the same margin as DDR5.
But "it's mostly price" and "it's structural" are not in tension here. They are the same finding stated from two ends. If bit growth is normal and revenue is up 5x on price alone, then the wall isn't a temporary gap that supply closes — it's a pricing equilibrium the whole chain has learned to defend.
Which brings us back to Seoul, and the SOCAMM cut Huang was there to explain away.
The reason Nvidia can ration memory in its flagship rack and still guide to strong HBM usage is that scarcity, for the seller, is not a problem. It is the product. The shortage is the pricing power.
Huang called it structural because the word does useful work: it tells hyperscalers to keep spending, tells memory makers the party lasts through 2028, and tells everyone the constraint is nobody's fault — just physics.
He's right about the physics. The euphemism is in pretending the people who built the wall would prefer it gone.